Universal utility for programming FPGA

Atari STE MiSTery core for the Tang Nano FPGAs

Commodore C64 core for the Tang Nano 20K Primer 25K Mega 60k Mega 138K Pro Console60k/138k FPGA

An open source PSRAM/HyperRAM controller for Sipeed Tang Nano 9K / Gowin GW1NR-LV9QN88PC6/15 FPGA

Verilog implementation of PAL, NTSC and SECAM color encoding

Apple II FPGA Co-Processor

Tutorials centred around Gowin FPGA parts for the /r/GowinFPGA subreddit

A Pac-Man Arcade implementation for the TangNano9K using HDMI

A Dockerfile with a collections of ready to use open source EDA tools: Yosys, SimbiYosys (with Z3, boolector and Yices2), nextpnr-ice40, netxpnr-ecp5, nextpnr-gowin, Amaranth HDL, Silice and Verilator.

A simple CPU in VHDL for educational purposes

Atari 2600 VCS core for the Tang Nano 9k Nano 20K Primer 20k Primer 25K Mega 60k Mega 138K Pro Console60k/138k FPGA

Trying to get a new skill

Commodore VIC20 core for the Tang Nano 9k Nano 20k Primer 20k Primer 25k Mega 60k Mega138k Pro Console60k/138k FPGA

Open-source HDMI/DVI transmitter for the Gowin GW1NSR-powered Tang Nano 4K

Re-coded Gowin GW1N primitives for Verilator use

Apple IIe FPGA core for the Tang Nano 20K, Primer 25k, Mega 60k, Mega 138k Pro, Console 60k / 138k

Sipeed Tang Nano: Fully Opensource Toolchain for FPGA Synthesis, Place & Route, Simulation and Download/Flash.

Tang Primer 25K's GW5A-based FPGA SPI interfaced HDMI output and more

Examples for Gowin Tang Nano 4k FPGA-board.

Blink demo for GOWIN FPGA dev kit DK-START-GW1N4

TFT Clock by Gowin FPGA | 华中科技大学电信学院硬件课设基于国产高云FPGA的多功能TFT屏数字钟

No description provided.

Simple Verilog interface for the PUYA P25Q32H flash chip of the Tang Nano 4K board

本项目采用高云 ACG525 FPGA 作为核心硬件平台，利用FPGA 的硬件并行处理特性打造集多协议转换、数字信号测量、模拟信号采集与发生于一体的多功能数字信号调试终端。 项目依托 FPGA 的硬件逻辑并行架构，可同步实现 CDC 串口驱动的 USB转 SPI、I2C、UART 等多协议转换及多路 PWM 输出；针对数字信号测量，FPGA 能通过计数器及高精度时钟测量周期性信号的频率、占空比及高低电平时间。在模拟信号处理方面，该作品可驱动高速 ADC 与 DAC，实现模拟信号的高速采集、存储、传输及波形生成，且能通过硬件逻辑直接处理数据，无需依赖外部处理器，大幅降低数据传输延迟。同时我们设计了GUI连接用户和底层FPGA硬件，实现用户对此产品的轻松操控。

A small and cheap triggering system for side channel attacks using Gowin FPGA

FPGA-based camera streaming on Gowin Tang Primer 20K | OV5640 @ 640×480 @ 51.45 FPS | HDMI + USB 2.0 HS

micro embedded Matrix

🐙 Tang Nano 9K port of Gottlieb MA55 sound board. VHDL code ported to FPGA with work by James Sweet; open hardware for arcade audio.

HDMI Transmitter(Source) Core for Arora FPGA family

SAP-1 implementation in VHDL for the Sipeed Tang Nano 9k