Advanced Simulation Library - hardware accelerated multiphysics simulation platform.

CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture

Spector: An OpenCL FPGA Benchmark Suite

dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators

A Fast DNN Accelerator Design Space Exploration Framework.

Design Space Exploration (DSE) is a suite of open-source Grasshopper tools developed by Digital Structures at MIT. These tools aim to support visual, performance-based design space exploration and interactive multi-objective optimization (MOO) for conceptual design.

InfiniTAM on FPGA

AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper accepted to ICCAD2023)!

[FPGA 2023] FADO: Floorplan-Aware Directive Optimization for High-Level Synthesis Designs on Multi-Die FPGAs

:dart: soap - Structural Optimisation of Arithmetic Programs

Cycle-level, trace-driven, parallel GPU simulator for NVIDIA Pascal.

The core repository of TURNUS: a design space exploration and optimization framework for dynamic dataflow programs

Multi-Objective Hardware-Mapping Co-Optimisation for Multi-DNN Workloads on Chiplet-based Accelerators

Repository of DB4HLS. A database of design space exploration in high-level synthesis.

Design space identification and exploration

Approximate Printed Machine Learning Classifiers

High-level heterogeneous adaptive embedded system designer and simulator

A JAVA/Processing sketch that implements the Force Density Method (FDM) and Dynamic Form-Finding (PSS: Particle-Spring Systems). Form finding, structural design and optimization of grid shells. Massachusetts Institute of Technology (MIT). 2015/2017.

Public Release Version of PDOPT

Laboratory exercises on cards with ARM, FPGA and sensors for "Embedded System Design" course NTUA 2020 -2021

This repository describes all code used in the development for the user-guided design space exploration tool for 3D concrete printed bridges.

HLS Design Space Exploration with RL+MCTS

VESPA prototyping framework for FPGA-based, accelerator-oriented SoCs

A JAVA/Processing sketch that implements a geometric solution to the generation of optimum Mitchell trusses. Structural design and optimization of frames (trusses). Massachusetts Institute of Technology (MIT). 2015/2017.

The goal of this practical work is to train in practical embedded system design, and to perform Design Space Exploration (DSE) to experience consequences of computerarchitectural choices. The focus is on the embedded part of the cyber-physical system.

A framework for Automated Design Space Exploration

Design space exploration tool for SODA (MLIR-HLS) optimizing neural network hardware accelerators. Uses both exhaustive search and decision trees to automate loop/memory optimizations for efficient hardware designs. Supports convolution and fully connected layers with performance or energy-oriented options.

Design Space Exploration for VLIW (VEX)

A local-first tool for managing literature reviews, tagging papers, and exploring design spaces.

No description provided.