Design and verification of the Advanced Peripheral Bus (APB) protocol using Verilog. Includes Verilog modules for APB operations and a testbench for verifying functionality and compliance with protocol standards.

Verilog-based vending machine controller IP core, supporting multi-clock domain operation, inventory management, and currency denominations. Built with the APB protocol for efficient configuration, it offers smart change calculation and robust error handling. Developed in the SURE ProEd internship training with experts.

Build environment for APB-UART module

UVM-based verification environment for an APB FIFO design with comprehensive test coverage and bug analysis.

This repository contains Verilog codes of sequential and combinational circuits along with some protocols.