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ax3ghazy

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Repositories

42
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ax3ghazy/mtasa-blueFork

Multi Theft Auto is a game engine that adds full network multiplayer functionality to Rockstar North's Grand Theft Auto game series, in which this functionality is not originally found.

C++00Updated 2 months ago
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ax3ghazy/padringFork

A padring generator for ASICs

C++01Updated 1 year ago
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ax3ghazy/cu-grFork

CUGR, VLSI Global Routing Tool Developed by CUHK

C++22Updated 1 year ago
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ax3ghazy/vimtexFork

VimTeX: A modern Vim and neovim filetype plugin for LaTeX files.

00Updated 2 years ago
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ax3ghazy/OpenDBFork

Database and Tool Framework for EDA

C++00Updated 3 years ago
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ax3ghazy/pylglFork

Python bindings to lingeling

C00Updated 3 years ago
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ax3ghazy/openlaneFork

OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.

Verilog00Updated 4 years ago
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ax3ghazy/FastRouteFork

LEF/DEF-based port of Iowa State's open-source FastRoute 4.1

00Updated 4 years ago
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ax3ghazy/ioPlacerFork

IO and Pin Placer for Floorplan-Placement Subflow

00Updated 4 years ago
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ax3ghazy/caravel_project_example

No description provided.

Verilog00Updated 4 years ago
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ax3ghazy/caravelFork

Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.

00Updated 4 years ago
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ax3ghazy/pdnFork

PDN step with per-PDK setup and configuration

C++00Updated 4 years ago
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ax3ghazy/lefFork

Si2 LEF parser

00Updated 4 years ago
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ax3ghazy/sphinxcontrib-hdl-diagramsFork

Sphinx Extension which generates various types of diagrams from Verilog code.

00Updated 5 years ago
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ax3ghazy/repoB

No description provided.

01Updated 5 years ago
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ax3ghazy/netgenFork

Netgen complete LVS tool for comparing SPICE or verilog netlists

00Updated 5 years ago
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ax3ghazy/FaultFork

A complete Open Source Design for Testing (DFT) Solution

00Updated 5 years ago
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ax3ghazy/magicFork

Magic VLSI Layout Tool

C00Updated 5 years ago
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ax3ghazy/OpenPhySynFork

EDA physical synthesis optimization kit

Verilog00Updated 5 years ago
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ax3ghazy/openlane-logo-testFork

No description provided.

Tcl00Updated 5 years ago
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ax3ghazy/skywater-pdkFork

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

00Updated 5 years ago
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ax3ghazy/sky130_timing_data

No description provided.

00Updated 5 years ago
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ax3ghazy/open_pdksFork

PDK installer for open-source EDA tools and toolchains. Distributed with a setup for the Google/SkyWater 130nm process.

Python00Updated 5 years ago
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ax3ghazy/clockless-inverterFork

No description provided.

Tcl00Updated 5 years ago
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ax3ghazy/OpenROADFork

OpenROAD's unified application implementing an RTL-to-GDS Flow

00Updated 5 years ago
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ax3ghazy/ibex-yosys-buildFork

No description provided.

00Updated 5 years ago
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ax3ghazy/OpenROAD-flowFork

OpenROAD's top level repo pointing to stable binaries, code, sample designs and an example flow

Verilog00Updated 5 years ago
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ax3ghazy/new-projectFork

This repository contains a template you can use to seed a repository for a new open source project.

00Updated 5 years ago
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ax3ghazy/addlicenseFork

A program which ensures source code files have copyright license headers by scanning directory patterns recursively

Go00Updated 5 years ago
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ax3ghazy/TritonRouteFork

UCSD Detailed Router

01Updated 5 years ago

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