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ajackevic/ELEC5882
The Design and Implementation of a Pulse Compression Filter on an FPGA.
Verilog3316Updated 1 month ago
alpha-max-plus-beta-mincomplex-firfirfpgahilbert-transformmatched-filtermatlabnon-resoting-sqare-rootpulse-compression-filter
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ajackevic/ELEC3875
Design and implementation of an AES algorithm on an MATLAB & FPGA
Verilog71Updated 12 months ago