5-stage pipelined 32-bit MIPS microprocessor in Verilog

Tutorial series on verilog with code examples. Contains basic verilog code implementations and concepts.

This repo contains code snippets written in verilog as part of course Computer Architecture of my university curriculum

Verilog modules for beginners

Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface

Verilog Snippets for partial fulfilment of CS-F342 Computer Architecture,BITS Pilani

Implementation of the RISC-V 32 bit Integer and Compressed Instructions in Verilog.

A coocbook of HDL (primarily Verilog) modules

Some examples of Veitch-Karnaugh maps solved using verilog language developed as coursework of Architecture and Computer Organization I- @Puc Minas

Verilog modules for reference

Курс по программированию ПЛИС с примерами