64 results for “topic:moore-machine”
Fast, easy Javascript finite state machines with visualizations; enjoy a one liner FSM instead of pages. MIT; Typescripted; 100% test coverage. Implements the FSL language.
一个基于长连接游戏（以棋牌游戏--麻将为例）设计的有限状态机
Moore Machine Networks (MMN): Learning Finite-State Representations of Recurrent Policy Networks
A Typed Hierarchical State Machine Framework in C++
A simple python implementation of a DFA.
Bicategories of automata, completeness of F-automata in monoidal categories, adjoints between (semi)bicategories; https://arxiv.org/pdf/2303.03867, https://arxiv.org/pdf/2303.03865, https://arxiv.org/abs/2305.00272
Implementaciones para diseño de sistemas digitales, comenzando por Flip Flops, registros, autómatas (Máquinas de Moore y Máquinas de Mealy), memorias ROM y sensores de presencia, utilizando para cada uno de estos, distintos contadores (anillo, década, etc).
Some of small codes and implementation of modules in Computer Aided Design in VHDL by ActiveHDL
A simulation of mealy and moore machines.
A tiny finite state machine for .NET
An automatic traffic light controller is designed and simulated using the concept of Finite State Machine in ModelSim.
This program is simulating mealy and moore machines.
No description provided.
Verilog Programs
No description provided.
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Disciplina que tem o objetivo de ensinar os fundamentos da teoria da computação, incluindo linguagens formais, autômatos e gramáticas. O curso explora como esses conceitos teóricos podem ser aplicados para modelar e solucionar problemas computacionais.
This was a project in which I designed a LCD display for signal strength indication, using "Moore Machine" Basics, in Logisim, for a Cell Phone Screen.
Курс по программированию ПЛИС с примерами
A Verilog-based state machine module for managing resource arbitration among multiple requesters in a synchronous digital system.
Moore machines and transducers (work in progress)
A lexical analyzer for the C- language made in Python using Moore's Machine.
A fully functional 2-way traffic light controller designed on the LogicalStep FPGA using VHDL, featuring a 16-state Moore/Mealy machine, pedestrian request handling, and metastability protection.
An FSM framework for creating Automaton
Moore and Mealy Machine architecture (model)
moore-machine-simulator
This project implements a Finite State Machine (FSM) in Verilog to control a simple traffic light system.The design models real-world sequential logic using a Moore machine (outputs depend only on the current state).A testbench verifies the functionality by simulating clock cycles and observing the light outputs.
No description provided.
An Abstract Deterministic Finite State Machine/Transducer
REST API store in web heroic servers using a basic CI/CD pipeline when pushing to the main branch 🔥