:snowflake: Visual editor for open FPGA boards

Universal utility for programming FPGA

This is the development repository for the OpenFHE library. The current development version is 1.5.0 (released on February 26, 2026). The current stable version is 1.4.2 (released on October 20, 2025).

:seedling: Open source ecosystem for open FPGA boards

"Randar" is an exploit for Minecraft which uses LLL lattice reduction to crack the internal state of an incorrectly reused java.util.Random in the Minecraft server, then works backwards from that to locate other players currently loaded into the world.

Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

attacking RSA via lattice reductions (LLL)

An abstraction library for interfacing EDA tools

An ECP5 FPGA Dev Board in a Pi Zero form

The PoC Library has been forked to github.com/VHDL/PoC. See new address below

Logic programming in Rust

PlatformIO IDE for Atom: The next generation integrated development environment for IoT

A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz

:star2: IceZUM Alhambra: an Arduino-like Open FPGA electronic board

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

Awesome list for cryptographic secure computation paper. This repo includes *Lattice*, *DifferentialPrivacy*, *MPC* and also a comprehensive summary for top conferences.

A month-long zkp study group, one topic at a time.

First SDR platform for IoT networks

smallish ice40 / raspberrypi ultrasound hardware

ASR with PyTorch

:book: 现代统计图形（人民邮电出版社出版） Modern Statistical Graphics

ggplot everything

Minimal SDR with Lattice MachXO2 FPGA. And a port to Cyclone3 by Steven Groom

:atm: Second life for FPGA boards which can be repurposed to DYI/Hobby projects ...............................................................................................

📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.

DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow video controller with alpha-blended layers. Docs & TBs included.

DisplayPort IP-core

A JSON library implemented in VHDL.

Low-cost ECP5 FPGA development board

Tools for running FPGA vendor toolchains with Docker