RISC-V simulator for x86-64

An unofficial assembly reference for RISC-V.

RISC-V: Open-source instruction set architecture based on reduced instruction set computer principles.

F# RISC-V Instruction Set formal specification

iOS从入门到进阶 - 技术合集

STM32-based ISA-over-USB-adapter

Browser-based Arm micro-architecture simulator with single-cycle and pipelined CPU visualization (educational, simulator)

RTL8019-based ISA network card, NE2000-compatible

Verilog Implementation of an ARM LEGv8 CPU

Serializing EDI as JSON

MRSIC32 ISA documentation and development

For finding, sharing and exchanging Data, Models, Simulations and Processes in Science.

ISA 8bit sound card based on the ES1868F sound chip, providing Sound Blaster PRO and OPL3 compatibility in a highly integrated package

x86-64 | ARM (AArch32/AArch64/THUMB) full instruction set.

Multi-Architecture UEFI Environment Driver

A technical checklist to spark curiosity and reflection when designing software systems.

Utilities for accessing AMD's Machine-Readable GPU ISA Specifications.

ISA tools API

Tool for creating and editing annotation tables in ARCs.

Sound Card for the ISA (8bit) bus sporting Sound Blaster / Sound Blaster PRO emulation via ES688F chip, and a real Yamaha OPL3 FM Synth. It's also completely jumper configurable.

A simple CPU in VHDL for educational purposes

ISA 4Mb EMS expansion board

✔️ Port of RISCOF to check NEORV32 for RISC-V ISA compatibility.

A repository of results for runs of sandsifter on various x86 CPU's

8bit ISA NE2000-compatible network card based on the RTL8019AS chip

Viking ISA

A multi-cycle RISC CPU (processor) like MIPS-CPU architecture in VHDL ( a hardware-side implementation )

FPGA Sound Blaster over LPC bus experiments

LEOS - Open Source software for editing legislation. This code is taken from joinup and placed in git repository as it is.

IBM Colour Graphics Adapter schematics redrawn in KiCad