30 results for “topic:fpga-soc-linux”
User space mappable dma buffer device driver for Linux.
NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.
Basic RISC-V Test SoC
FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq-Zybo:PYNQ-Z1 Altera:de0-nano-soc:de10-nano)
FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq Ultrascale+ MPSoC)
Device Tree Blob Overlay Configuration File System
FPGA Clock Configuration Device Driver for Linux
DE10-Nano FPGA Configuration from Linux. Software to configure the FPGA portion of the Cyclone V SoC.
Mirror of GitLab repository, all issues and pull requests should be created there.
Audio Signal Processing SoC
Accelerating a Classic 3D Video Game (The DOOM) on Heterogeneous Reconfigurable MPSoCs
⛔ DEPRECATED ⛔ HERO Software Development Kit
Parse hardware design information to generate project specific machine configuration
uiomem is a Linux device driver for accessing a memory area outside the Linux Kernel management from user space.
Prebuilt images for Linux for the Pano Logic G2
Thesis: Custom Filter Designs on the Red Pitaya
FPGA Configuration Interface for Linux FPGA Manager Framework
Various lessons learned while designing an OV5640 camera display in VHDL/Embedded Linux on a Cyclone V SOC board
Audio Signal Processing SoC Project Website
UltraZed Development
Tutorial and base project: TEE on AMD Zynq UltraScale+ using Arm TrustZone
PYNQ Festival
Altera wrappers for C applications using Altera's 16550 UART Core through Avalon Bus on Cyclone V.
A language learning solution to learn vocabulary from day-to-day objects with front-end on De1-SoC Cyclone V FPGA and backend on a Raspberry Pi, incorporating Microsoft Azure Cognitive Services
Digilent Atlys Board Linux Flash Image
Linux Kernel (6.1) Image, Device Trees, Debian Packages for Zynq , CycloneV SoC
Driver - Library for C applications using Altera's UART Core through Avalon Bus on Cyclone V.
Smart Automation Controller for Precision Agriculture
FPGA Clock Configuration Device Driver Debian Package
Some exercises on verilog.