An Open-source FPGA IP Generator

NonTrivial-MIPS is a synthesizable superscalar MIPS processor with branch prediction and FPU support, and it is capable of booting linux.

NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and try. Hope THIS PAGE may Helps you a bit. Contact Me:junning.wu@ia.ac.cn

An AXI4 crossbar implementation in SystemVerilog

Basic RISC-V Test SoC

A version of the HDMI2USB firmware based around LiteX tools produced by @Enjoy-Digital (based on misoc+migen created by @M-Labs)

Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL

An Open Source configuration of the Arty platform

A c/RISCV of "Let's Build a Compiler" by Jack Crenshaw

The Antikernel operating system project

The Task Parallel System Composer (TaPaSCo)

PYNQ example of using the RFSoC as a QPSK transceiver.

MIPS32 CPU implemented in SystemVerilog, with superscalar and FPU support

Yet Another RISC-V Implementation

Z80 CPU for OpenFPGAs, with Icestudio

RFSoC Spectrum Analyser Module on PYNQ.

HLS branch of Halide

Original FPGA platform

Textbook on system-on-chip design using Arm Cortex-M microcontrollers covering AMBA, peripherals, and embedded software (educational)

Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP

SoftCPU/SoC engine-V

Partial implementation of Knuth's MMIX processor (FPGA softcore)

Intel Quartus Prime Synthesis Engine for Docker

My own FPGA architecture simulated in VHDL, realized with 7400-logic on PCB.

CMod-S6 SoC

YARI is a high performance open source FPGA soft-core RISC implementation, binary compatible with MIPS I. The distribution package includes a complete SoC, simulator, GDB stub, scripts, and various examples.

[SIGCOMM 2023] Lightning: A Reconfigurable Photonic-Electronic SmartNIC for Fast and Energy-Efficient Inference

Textbook for advanced students and engineers on modern SoC design using Arm Cortex-A: architecture, interconnects, validation, and fabrication (educational)

PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.

Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.