Education kit for teaching introductory Arm-based system-on-chip design on FPGA with lectures and practical labs (educational)

Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.

The AHB to APB bridge is an AHB slave and the only APB master which provides an interface between the highspeed AHB and the low-power APB. Read and write transfers on the AHB are converted into equivalent transfers on the APB.

Assertion-Based Formal Verification of an AHB2APB bridge, featuring SystemVerilog assertions, RTL designs, and detailed documentation including a final report and project progression presentation.

Cocotb AHB Extension - AHB VIP

This repo contains a collection of Verilog+System Verilog+RTL+UVM+Protocols Projects

This is my hobby project, which contain my rsic-v core and my convolutional layer with AMBA bus

Overview of all Hochfrequenz libraries and tools related to an improved digital market communication for German utilities

AMBA AHB 5.0 VIP in SystemVerilog based on UVM

An Anwendungshandbücher (AHB) scraper that extracts tables from docx files

Verilog AHB Bus implementation for VAAMAN

mirror of edi-energy.de that is periodically updated and allows to track changes

Roa Logic GitHub Pages Site (Top Level)

MIG AHB Utility Stack (MAUS): A Script to Match the Message Implementation Guide (MIG) with the Anwendungshandbuch (AHB)

highlight changes between AHB documents

AHB Tabellen - Anwendungshandbücher für Menschen

A Svelte App that displays FlatAnwendungshandbuchs which are generated by kohlrahbi. It displays AHBs _besser_ than edi-energy.de

Popular bus implementations in Verilog HDL

UVM-based verification of an AHB-to-APB bridge, validating protocol compliance, address decoding, data integrity, error handling, and corner cases using constrained-random testing and functional coverage.

Python Interface für XML basierte EDIFACT-Formate und Datenmodelle der Energiewirtschaft in Deutschland

This repo will contain the Verilog code implementation of various protocols that fall within AMBA protocol family such as APB, AHB, AXI and so on. I will implement it in parallel with learning theory. If possible I will also use UVM and system verilog to verify the functionality of the code once I finish learning system verilog and concepts of uvm

A C#/.NET client to communicate with the edifact-bo4e-converter aka transformer.bee

A presentation about Advanced Microcontroller Bus Architecture

Implementation and verification of an AMBA AHB-Lite bus system with a single master, decoder, and two slaves (RTL and FSM styles). Supports single and incrementing burst transfers.

Condition and Package Definitions extracted from Anwendungshandbüchern (AHB) by EDI@Energy

https://github.com/krevanth/FreeAHB : The official GIT repo of FreeAHB, a FOSS AHB 2.0 manager. (C) 2016-2024 Revanth Kamaraj (krevanth). Note that https://github.com/krevanth/FreeAHB was accidentally deleted but has now been fully restored to the same URL from backups on 22/05/2024. Fork list, issues, stars, watchers couldn't be restored.

A UVM AHB Agent

Python script to download/mirror edi-energy.de and sort the files (more structured than `wget --mirror`)

Functional Bus Description Language compiler backend for Advanced Microcontroller Bus Architecture 5 (AMBA5) specifications.

This repository contains the source code and results for AMBA AHB to APB Bridge design performing single read, single write and burst write transfers. The design is coded in Verilog, using Modelsim simulator and synthesized using Quartus Prime software.