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fermarsan/Multiplier_4b_sim

This example implements a digital 4-bit sequential multiplier simulation on SimulIDE

8-bit Sequential Multiplier Simulation

This example implements a digital 4-bit sequential multiplier simulation on SimulIDE, it is composed by:

  • 4-bit parallel input shift-right registers(subcircuits)
  • 8-bit parallel input shift-left register (subcircuit)
  • 8-bit parallel load register (subcircuit)
  • 4-bit zero comparator
  • 8-bit adder (subcircuit)
  • FSM Finite State Machine as control block (script) readme file

you can also see this tutorial (spanish).

This is done as a template in SimulIDE, for similar implementations.

Usage

You have to copy all the component's folders inside a one in the user data folder, for instance ~/User_data/testand associate it in Simulide.
You can see how to do this in the official SimulIDE's Tutorials:

Languages

AngelScript100.0%

Contributors

MIT License
Created December 23, 2024
Updated April 13, 2025
fermarsan/Multiplier_4b_sim | GitHunt