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FarrukhAijaz/Single-Cycle-Multi-Cycle-and-Pipeline-ARM-Based-Processor-Design

Architecure for the Data path and Controller as well as Hazard Units for a 32 bit ARM based Single Cycle, Multi Cycle and Pipelined Based Processor

Single Cycle Multi Cycle and Pipeline ARM Based Processor Design

Architecure for the Data path and Controller as well as Hazard Units for a 32 bit ARM based Single Cycle, Multi Cycle and Pipelined Based Processor

Languages

Verilog53.5%Python45.4%Makefile1.0%Forth0.0%

Contributors

Created June 28, 2024
Updated February 10, 2026