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AnthonyMichaelTDM/RISC-V_emulator

A simple RISC-V emulator written in rust. Supports the entire RV32IM instruction set. Integrated debugger. Does not support dynamic linking

RISCV Emulator

A simple RISC-V emulator written in rust.

Supports a subset of the base RISC-V 32 bit instruction set.

Accepts and runs RISC-V binary files in the ELF format.

only supports the .text and .data sections

doesn't support compressed binaries

assumes that .data and .text are contiguous in memory, with a small 0x1000 byte gap between them.

syscall support

Supported syscalls are a supset of those available in RARS.

Notable ommissions include sbrk, floating point syscalls, file io syscalls, midi syscalls, GetCWD, all dialog calls, and random number generation.

requirements

besides the obvious, you need to have the riscv toolchain installed. You can use paru to install it from the aur if you're on arch linux, like so:

sudo paru -S riscv64-unknown-elf-gcc

Getting a RISC-V ELF file

first write your risc-v .asm file, then compile it using the riscv toolchain:

riscv64-unknown-elf-gcc -march=rvim -mabi=ilp32 -x assembler -nostdlib -o <OUTPUT_FILE>.bin <INPUT_FILE>.asm

you can use the riscv64-elf-objdump tool to see the contents of the file:

riscv64-unknown-elf-objdump <OUTPUT_FILE>.bin -d

Languages

Rust94.7%Assembly5.3%

Contributors

MIT License
Created February 15, 2024
Updated February 10, 2026
AnthonyMichaelTDM/RISC-V_emulator | GitHunt